Course Logistics


For the Fall 2024 term, BBM231 classes and BBM233 labs will be held face-to-face. Hybrid or face-to-face Q&A meetings can be held as needed.

Staff


Teaching Assistant


Orhan Demirci

Teaching Assistant


Asst. Prof. Dr. Selma Dilek

Course Overview (To Be Updated)


Goals

Understanding the analytical approaches and digital systems. Understanding the methods followed in synthesizing and analyzing the digital systems. Notion of Verilog hardware description language.

Course Contents

  • Binary Systems
  • Codes
  • Boolean Algebra
  • Digital Logic Gates
  • Simplifying the Functions
  • Combinational Logic
  • Sequential Synchronous Logic
  • Counters
  • Design Problems
Textbook and References

Main Textbook: Digital Design and Computer Architecture, D. Harris, S. Harris, Morgan Kaufmann, 2007.


Reference Text: Digital Design, M. Morris Mano and Michael D. Ciletti, Prentice Hall.


Downloads

Lecture Notes

Lecture Notes (old from 2021):

  1. Part 1
  2. Part 2
  3. Part 3
  4. Part 4
  5. Part 5 - Midterm Review
  6. Part 6
  7. Part 7 - Final Review

Other downloads:

  1. Verilog Intro Tutorial
  2. More Verilog Examples (from 2020 Fall)
  3. Verilog Tutorial - Part 1
  4. Verilog Tutorial - Part 2
  5. Verilog Tutorial - Part 3


Course Schedule (Tentative)

BBM231 BBM233 Lab
Week # Topics Slides Chapter Quiz Tutorial Lab
1 Introduction to Digital Systems, Number systems Part 1 No lab
2 Number systems (cont.), Alphanumeric Codes, Logic Gates, CMOS transistors, Power Consumption Part 2 Q1 No lab
3 Combinational Logic Design: Boolean Equations, Boolean Algebra, Universal Gates, Multiple Input Gates Part 3 Q2 Introductory Session
4 Combinational Logic Design: SOP and POS Forms, Multilevel combinational Circuits, Karnough Maps Part 3 Q3 Lab Experiment 1 (Board) Group 1
5 Combinational Logic Design: Karnough Maps (cont.), Prime Implicants, Don't Care Conditions, Design with NAND or NOR Gates, XOR Function Part 3 Q4 Lab Experiment 1 (Board) Group 2
6 Analysis & Design of Combinational Logic, Half Adder and Full Adder, Hierarchical Realization, Carry Propagation, Overflow Conditions Part 4 Q5 Lab Experiment 2 & 3 (board) Group 1
7 Combinational Building Blocks: Decoders, Encoders, Multiplexers, ROM, Demultiplexers, Arithmetic circuits Part 4 Q6 Lab Experiment 2 & 3 (board) Group 2
8 Midterm Review, problem solving Part 5 Q7 Slides (to be updated) Verilog Tutorial
9 MIDTERM Verilog Practice (combinational)
10 Sequential Logic Design: Flip Flops Part 6 Q8 Lab Experiment 4 (Verilog Assignment 1)
11 Sequential Logic Design: Synchronous Logic Design, Finite State Machines, Design Examples Part 6 Q9 Verilog Practice (sequential)
12 Sequential Logic Design: Design Examples (cont.), State Reduction, State Assignment, Unused States Part 6 Q10 More Verilog Examples
13 Counters and Registers TBA Q11 Lab Experiment 5 (Verilog Assignment 2)
14 Final Review, Problem Solving Part 7 Q12 Final Project Out
Final Exam Final Project Submission
Grading

BBM231 Grading
Class participation 5%
Online Quiz 20%
Midterm 35%
Final Exam 40%
BBM233 (Lab) Grading
3 Board Experiments 30% (10% each)
2 Verilog Quizzes 5%
2 Verilog Assignments 40% (20% each)
Final Project (Verilog) 25%